RC coupled amplifier at high frequency, Lecture XXIV and XXV.

Analog systems and applications — lectures – XXIV, XXV.

Single stage common emitter RC coupled amplifier at high frequency, Lecture 24 and 25.

This article belongs to a series of lectures on analog electronics, the paper goes by the name “Analog Systems and Applications” for the physics honors degree class, — click on link to left to access all lectures of this series. This article comprises of the 24th and 25th lecture of the series. The lectures were delivered on 2nd April 2018.

RC coupled amplifier in high frequency range.

In our last lecture we discussed the case of a single stage RC coupled amplifier, a common emitter transistor circuit, for its response at low frequencies, i.e. frequencies that are less than 50 Hz. Today we will discuss what changes are going to be effected in the same circuit when we pass signal at high frequency. We defined high frequency in our last lecture to be one which is higher than 20 kHz.

• In the depletion layers at the junctions of the CE transistor that we have been discussing, capacitance are developed due to depletion. (Read more about depletion layer here.) These capacitance are denoted by C_be, C_bc and C_ce according to the terminals they appear across. They can’t be neglected in general when the frequency of signal is high.
• C_be: its the internal capacitance of the forward biased emitter-base junction. It offers a low impedance in the input side, at high frequency application of signal.
• C_bc: its the internal capacitance of the reverse biased collector-base junction. It connects output with input and provides negative feed-back.
• C_ce: its the internal capacitance between the collector and the emitter, it produces a shunting effect in the output side, at high frequency.
• C_w1 and C_w2: these are the wiring capacitance, as shown in the following diagram. These are small valued capacitance but their reactance are significant at high frequencies.
• C_E and C_C: and C_E is the bypass capacitor and it is considered sufficiently large so that its reactance at high frequency is negligible. Reactance of C_C is also negligible.

Miller theorem and Miller effect

When an impedance Z is connected from output to the input of an inverting amplifier with voltage gain A, Z may be replaced by an input Miller impedance: Z/A+1 and an output Miller impedance: (ZA)/A+1.

A schematic that depicts the Miller’s theorem stated above is shown in the following diagram.

When Z is replaced by a capacitance C, Miller’s theorem dictates C(1+A) as the input capacitance and C(1+A)/A as the output capacitance.

Thus total input capacitance of our transistor circuit is: C_in = C_be + (1 + A_v) C_bc. This input impedance, at high frequency, for a single stage amplifier is small and can be neglected.

But in the output of the first stage, it increases due to presence of strong wiring capacitance C_w2 and input capacitance of second stage C_in. Thus: C_s = C_ce + C_w2 + C_in.

Hybrid equivalent circuit for high frequency response is shown below.

Now we can find the voltage gain etc as before in the case of medium and small frequency — see linked articles.

Applying Kirchhoff’ (voltage) law to the input loop: V_i – h_reV_ce = h_iei_b.

Applying Kirchhoff’s current law at node C, in the output circuit: h_fei_B + h_oeV_o + V_o/R_C + V_o/R_L jωC_SV_o = 0.

Lets use the fact: V_ce = V_o and solve for V_o. As before we obtain: .

Now we can divide this (A_V,h) by the voltage gain at mid-frequency, A_V,m that we derived earlier, as we did before for low frequency voltage gain.

.

Thus

• (i) gain at high frequency is less than gain at med-frequency,
• (ii) gain decreases with increase in frequency due to shunt capacitance C_S,
• (iii) as before we can define an upper cutoff frequency f_h = f₂.

. Then: or .

Thus at f = f₂, |A_V,h / A_V,m| = 1/√2 = 0.707 ≡ 70.7 % as in the case of low-frequency cutoff, the gain drops to a level of this percentage of maximum gain, as given by this factor, at this upper cutoff frequency. Total phase shift of voltage gain in high frequency range is given by: φ_h = 180⁰ – θ_l = 180⁰ – tan^-1 (f/f_h). At f = f₂, φ_h = 180⁰ – 45⁰ = 135⁰.

Now the circuit behaves like a low pass RC circuit. Effective resistance is given by: Then .

For small value of h_oe, h_re .

Thus this is a parallel combination of the shunt resistances in the collector circuit.

The voltage gain in decibel vs frequency in a log scale is known as the Bode plot.

Here is the definition of a decibel: Decibel power gain = 10 log₁₀ (P_oP_i) = 10 log₁₀ A_P.