Single stage CE amplifier, Lecture-XXI and XXII.

Analog systems and applications — lecture-XXI & XXII.

Analysis of a single stage common emitter (CE) amplifier and its hybrid equivalent circuit.

This article belongs to a series of lectures on analog electronics, the paper goes by the name “Analog Systems and Applications” for the physics honors degree class. All lectures of this series will be found here. This article comprises of the 21st and 22nd lectures of the series. The lectures were delivered on 28th March 2018.

In the discussions of the BJT so far we have discussed, their construction and working. It has been mentioned earlier that the BJT is capable of 2 functions, namely switching and amplification. It works under 3 regions of operations: active region which lies between the reverse-reverse biased cutoff region and forward-forward biased saturation region.

In addition we saw what happens when the BJT is biased, and discussed in detail two different ways that it can be biased in. Today we will see an application of all that we have learned so far. We will discuss today the single stage common emitter amplifier. We will also study the very interesting and useful idea of hybrid circuit analysis.

Lecture-21

Single stage amplifier

A single stage amplifier amplifies a weak signal but uses only a single transistor to achieve this. Lets discuss the case of a common emitter configuration circuit in detail.

This type of amplifier introduces a phase of 180⁰ between the input and the output signal. Lets draw a suitable diagram which utilizes a “voltage divider biasing” method which we discussed in out last lecture.

Single stage common emitter amplifier.

• Biasing circuit: The biasing circuit consists of action of 3 resistances, R₁, R₂ and R_E. This circuit achieves stabilization for the amplifier by determining the operating point, in the active region, nearly at the middle of the AC load line — read more about operating point and load line, in this article.
• Input capacitor C_in: It couples the input signal V_i to the base of the transistor. It also allows the AC signal to flow, but blocks the DC component in V_i. DC biasing conditions are preserved by this capacitor, when AC signal is applied.
• Coupling capacitor C_C: It is used to couple the output signal from the BJT to the load resistance R_L. In multistage amplifiers, this capacitor couples one stage of amplification to the next stage. It isolates the DC component – in the AC, in one stage, from the next stage. It allows passage of AC signal from one stage to the next.

C_in and C_C are called “blocking” or “coupling” capacitors, as they allow passage of AC signal but block the DC component in the signal.

• Emitter bypass capacitor C_E: C_E is connected parallel to the emitter resistance R_E. Here reactance of the path via C_E is low. Thus it acts like a bypass for the amplified AC signal. If C_E is not utilized, AC signal through R_E will suffer a drop in potential. This will feedback the AC input voltage. C_E offers a reactance an order of magnitude smaller than R_E, (X_CE ≤ R_E / 10) for lowest frequency in the input signal. Thus the output amplified signal chooses the low reactance path along C_E. C_E does not alter DC biasing condition.
• Load resistance R_L: It is the total resistance of components connected to the output. Eg in case of multistage transistor based amplifiers input resistance of successive stage is the load resistance for the concurrent circuit.

Determination of currents.

• Base current: When Ac signal is not applied, the DC base current I_B flows due to biasing. When AC signal V_i is applied, AC base current I_b flows through the base. Total base current is then given by: . Here (I_B) is DC and (I_b) is AC.
• Collector current: In absence of AC signal, DC collector current I_C flows due to biasing. Upon application of AC signal, AC collector current I_c (AC with small letter subscript c) flows in addition to I_C. Total collector current is then given by: .
• Emitter current: Similar to the above occurrence the total emitter current is given by: . Base current is usually very small; I_E ≈ I_C and I_e ≈ I_c (AC).

Mathematically it can be seen that: V_CC = V_CE + i_CR_C or V_CE = V_CC – I_CR_C – I_c(AC)R_C or dV_CE = – (dI_c(AC))R_C — as DC values are constant. So there is a phase lag of 180⁰ between input and output.

This also vindicates our earlier assertion.

• The DC load line can be determined as before. (See here) The AC load line can be determined by graphical method. Here R_ac = R_C || R_L. Thus slope of AC load line is given by: -1/R_ac = -(R_C + R_L)/ (R_C*R_L). The instantaneous operating points due to AC signal are no more constants. But AC load line goes through the DC Q point.

Lecture 22

Equivalent or Hybrid circuit method (h-parameter).

• Amplifiers can be analysed by segregating the total behavior into AC and DC equivalent circuits.
• For DC equivalent circuit, only DC conditions are considered. AC signal is replaced by internal impedance. Capacitors behave as open paths in circuits, and DC can’t pass through them.
• For AC equivalent circuit, only AC conditions are considered. DC sources are replaced by internal resistances.
• Capacitors are selected with large values. So for mid-frequencies, capacitors offer very low reactance (1/ωc).Then this corresponds to short circuits.
• For drawing and calculating AC behavior or AC equivalent circuit we use the 2-port network or hybrid-equivalent circuits. This uses definition of h-parameters as ensues in the following diagram and discussions.

We see that there are various parameters now, h_r, h_f, h_i and h_o. These are known as h-parameters. Those of you who have a prescient nature might already have had a premonition; r stands for reverse (it appears with output voltage V_o and parameter h_r in the input loop which are a feedback from the output loop) and f stands for forward (it appears with input current i and parameter h_f in the output circuit, these are feedback from the input loop). Obviously in the subscripts: i stands for input and o stands for output.

Keep a mind which is defined where (in which loop) and supposed to act in which. An input defined h-parameter must act on an input variable and an output defined h-parameter must act on an output variable.

The h-parameters with r or f in their subscript must act on a variable that’s defined in the opposite loop. In other words one with r is actually defined in the forward loop — its a messenger from forward to reverse hence, r in the subscripT. similarly f in the subscript means its defined in the input loop but going to emigrate to output loop to show its action. hollaback.

Now we can write: V_i = (h_i)i + (h_r) V_o eqⁿ 1 and I = (h_f)i + h_oV_o eqⁿ 2. Here i is the input current but I is the output current.

note that in eqⁿ 1 h_i is like a resistance variable whereas h_r is a dimensionless feedback parameter.

similarly in eqⁿ 2 h_f is a dimensionless feedback parameter but h_o is like a resistance variable.

For a common emitter (CE) configuration we will add an additional subscript e which will remind us we have a grounded emitter circuit. With the above discussions in mind our common emitter circuit drawn eg in our first diagram above, will look like the following in its hybrid avatar.

Input voltage source V_i is assumed to be ideal (this is known as first approximation i.e. zero internal resistance). ⇒ i_B remains almost same, irrespective of resistances R₁ and R₂. Thus R₁ and R₂ are omitted in our circuit analysis. R_L is parallel to R_C thus the effective AC resistance is R_ac = R_C || R_L = (R_C*R_L) / (R_C + R_L).

Lets use Kirchhoff’s law to the input loop in the above diagram. Basically we are adding subscript e to eqⁿ 1. V_i = (h_re) V_ce + (h_ie)i_B. Similarly when we do that to the output loop we obtain from eqⁿ 2; i_C = h_oeV_o + (h_fe)i_B.

V_o = – i_C R_ac (as i_C flows upwards its negative).

Thus we have – V_o / R_ac = h_oeV_o + (h_fe)i_B or V_o = -h_fe i_B R_ac / (1+ h_oeR_ac).

• Output Current: .
• Current Gain: .

We know that: V_ce = V_o. (The bypass capacitor C_E allows this.) Thus V_i = h_iei_B – h_reh_fe i_B R_ac / (1+ h_oeR_ac).

This gives us the

• Voltage Gain: . By using R_ac = R_C || R_L = (R_C*R_L) / (R_C + R_L) we have another expression for voltage gain. .

The negative sign indicates a phase reversal of 180⁰.

• Power Gain: power gain = current gain X voltage gain. So .
• Input Impedance: Z_ie = input voltage V_i / input current i_B. . This depends on R_L.
• Output Impedance: for this we recognize that R_L is disconnected. ⇒ R_ac = 0 so i_C – h_oeV_o – h_fei_B = 0. If R_S is internal resistance of input source for input circuit: h_reV_ce + i_B ( h_ie + R_S ) = 0. V_ce = V_o. These two equations give: . Thus output impedance is given by: .

Source resistance (R_S) decides output impedance. h_re is small and h_ie is large for junction transistors. This leads to simplified expressions for voltage and power gain. so finally we have;

Current Gain: .

Voltage Gain: .

Power Gain: .